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1 ltc2051/ltc2052 dual/quad zero-drift operational amplifiers n thermocouple amplifiers n electronic scales n medical instrumentation n strain gauge amplifiers n high resolution data acquisition n dc accurate rc active filters n low side current sense n maximum offset voltage of 3 m v n maximum offset voltage drift of 30nv/ c n small footprint, low profile ms8/gn16 packages n single supply operation: 2.7v to 5.5v n noise: 1.5 m v p-p (0.01hz to 10hz typ) n voltage gain: 140db (typ) n psrr: 130db (typ) n cmrr: 130db (typ) n supply current: 0.75ma (typ) per amplifier n extended common mode input range n output swings rail-to-rail n operating temperature range C 40 c to 85 c the ltc ? 2051/ltc2052 are dual/quad zero-drift opera- tional amplifiers available in the ms8 and so-8/gn16 and s14 packages. they operate from a single 2.7v supply and support 5v applications. the current consumption is 750 m a per op amp. the ltc2051/ltc2052, despite their miniature size, fea- ture uncompromising dc performance. the typical input offset voltage and offset drift are 0.5 m v and 10nv/ c. the almost zero dc offset and drift are supported with a power supply rejection ratio (psrr) and common mode rejec- tion ratio (cmrr) of more than 130db. the input common mode voltage ranges from the negative supply up to typically 1v from the positive supply. the ltc2051/ltc2052 also have an enhanced output stage capable of driving loads as low as 2k w to both supply rails. the open-loop gain is typically 140db. the ltc2051/ ltc2052 also feature a 1.5 m v p-p dc to 10hz noise and a 3mhz gain-bandwidth product. input referred noise 0.1hz to 10hz high performance low cost instrumentation amplifier , ltc and lt are registered trademarks of linear technology corporation. 2 1 0 C1 C2 m v 0246810 time (sec) 2052 ta02 features descriptio u applicatio s u typical applicatio u + r2 10k 0.1% r1 100 w 0.1% 7 4 5 6 3 2 20512 ta01 ?v + 1/2 ltc2051hv 1/2 ltc2051hv 8 1 5v ? in v in a v = 101 r2 10k 0.1% r1 100 w 0.1%
2 ltc2051/ltc2052 total supply voltage (v + to v C ) ltc2051/ltc2052 .................................................. 7v ltc2051hv/ltc2052hv ....................................... 12v input voltage (note 5) .......... (v + + 0.3v) to (v C C 0.3v) output short-circuit duration ......................... indefinite operating temperature range ............... C 40 c to 85 c specified temperature range (note 3) .. C 40 c to 85 c storage temperature range ................ C 65 c to 150 c lead temperature (soldering, 10 sec)................. 300 c (note 1) order part number absolute axi u rati gs w ww u package/order i for atio uu w t jmax = 125 c, q ja = 190 c/w 1 2 3 4 out a ?n a +in a v 8 7 6 5 v + out b ?n b +in b top view ms8 package 8-lead plastic msop 1 2 3 4 5 out a in a +in a v shdn a 10 9 8 7 6 v + out b in b +in b shdn b top view ms10 package 10-lead plastic msop top view v + out b ?n b +in b out a in a +in a v 1 2 3 4 8 7 6 5 s8 package 8-lead plastic so t jmax = 125 c, q ja = 250 c/w t jmax = 125 c, q ja = 250 c/w ms8 part marking ltc2051cms8 ltc2051ims8 ltc2051hvcms8 ltc2051hvims8 ltmn ltmp ltpj ltpk order part number ms10 part marking ltc2051cms10 ltc2051ims10 ltc2051hvcms10 LTC2051HVIMS10 ltmq ltmr ltrb ltrc order part number s8 part marking ltc2051cs8 ltc2051is8 ltc2051hvcs8 ltc2051hvis8 2051 2051i 2051hv 051hvi gn package 16-lead plastic ssop 1 2 3 4 5 6 7 8 top view 16 15 14 13 12 11 10 9 out a in a +in a v + +in b in b out b nc out d in d +in d v +in c in c out c nc order part number ltc2052cgn ltc2052ign ltc2052hvcgn ltc2052hvign t jmax = 125 c, q ja = 110 c/w gn part marking 2052 2052i 2052hv 052hvi order part number ltc2052cs ltc2052is ltc2052hvcs ltc2052hvis top view s package 14-lead plastic so 1 2 3 4 5 6 7 14 13 12 11 10 9 8 out a in a +in a v + +in b in b out b out d in d +in d v +in c in c out c consult factory for military grade parts. t jmax = 125 c, q ja = 110 c/w
3 ltc2051/ltc2052 (ltc2051/ltc2052, ltc2051hv/ltc2052hv) the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v s = 3v, 5v unless otherwise noted. (note 3) parameter conditions min typ max units input offset voltage (note 2) 0.5 3 m v average input offset drift (note 2) l 0.01 0.03 m v/ c long-term offset drift 50 nv/ ? mo input bias current (note 4) v s = 3v 8 50 pa v s = 3v l 100 pa v s = 5v 25 75 pa v s = 5v l 150 pa input offset current (note 4) v s = 3v 100 pa v s = 3v l 150 pa v s = 5v 150 pa v s = 5v l 200 pa input noise voltage r s = 100 w , dc to 10hz 1.5 m v p-p common mode rejection ratio v cm = gnd to v + C 1.3, v s = 3v 115 130 db l 110 130 db v cm = gnd to v + C 1.3, v s = 5v 120 130 db l 115 130 db power supply rejection ratio 120 130 db l 115 130 db large-signal voltage gain r l = 10k, v s = 3v 120 140 db l 115 140 db r l = 10k, v s = 5v 125 140 db l 120 140 db output voltage swing high r l = 2k to gnd l v + C 0.15 v + C 0.06 v r l = 10k to gnd l v + C 0.05 v + C 0.02 v output voltage swing low r l = 2k to gnd l 215mv r l = 10k to gnd l 215mv slew rate 2v/ m s gain bandwidth product 3 mhz supply current (per amplifier) no load, v s = 3v, v shdn = v ih l 0.75 1.0 ma no load, v s = 5v, v shdn = v ih l 0.85 1.2 ma supply current, shutdown v shdn = v il , v s = 3v l 25 m a v shdn = v il , v s = 5v l 410 m a shutdown pin input low voltage (v il ) l v C + 0.5 v shutdown pin input high voltage (v ih ) l v + C 0.5 v shutdown pin input current v shdn = v il , v s = 3v l C1 C3 m a v shdn = v il , v s = 5v l C2 C5 m a internal sampling frequency 7.5 khz electrical characteristics
4 ltc2051/ltc2052 note 1: absolute maximum ratings are those values beyond which the life of the device may be impaired. note 2: these parameters are guaranteed by design. thermocouple effects preclude measurements of these voltage levels during automated testing. note 3: the ltc2051c/ltc2052c, ltc2051hvc/ltc2052hvc are guaranteed to meet specified performance from 0 c to 70 c and are designed, characterized and expected to meet these extended temperature limits, but are not tested at C 40 c and 85 c. the ltc2051i/ltc2052i, ltc2051hvi/ltc2052hvi are guaranteed to meet the extended temperature limits. (ltc2051hv/ltc2052hv) the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v s = 5v unless otherwise noted. (note 3) parameter conditions min typ max units input offset voltage (note 2) 1 3 m v average input offset drift (note 2) l 0.01 0.03 m v/ c long-term offset drift 50 nv/ ? mo input bias current (note 4) 90 150 pa l 300 pa input offset current (note 4) 300 pa l 500 pa input noise voltage r s = 100 w , dc to 10hz 1.5 m v p-p common mode rejection ratio v cm = v C to v + C 1.3 125 130 db l 120 130 db power supply rejection ratio 120 130 db l 115 130 db large-signal voltage gain r l = 10k 125 140 db l 120 140 db maximum output voltage swing r l = 2k to gnd l 4.75 4.92 v r l = 10k to gnd l 4.90 4.98 v slew rate 2v/ m s gain bandwidth product 3 mhz supply current (per amplifier) no load, v shdn = v ih l 1 1.5 ma supply current, shutdown v shdn = v il l 15 30 m a shutdown pin input low voltage (v il ) l v C + 0.5 v shutdown pin input high voltage (v ih ) l v + C 0.5 v shutdown pin input current v shdn = v il l C7 C15 m a internal sampling frequency 7.5 khz electrical characteristics note 4: the bias current measurement accuracy depends on the proximity of the negative supply bypass capacitors to the device under test. because of this, only the bias current of channel b (ltc2051) and channels a and b (ltc2052) are 100% tested to the data sheet specifications. the bias currents of the remaining channels are 100% tested to relaxed limits, however, their values are guaranteed by design to meet the data sheet limits. note 5: this parameter is guaranteed to meet specified performance through design and characterization. it has not been tested.
5 ltc2051/ltc2052 output voltage swing vs load resistance common mode rejection ratio vs frequency dc cmrr vs common mode input range psrr vs frequency typical perfor a ce characteristics uw frequency (hz) 20 cmrr (db) 40 80 120 140 1 100 1k 100k 20512 g01 0 10 10k 60 100 v s = 3v or 5v v cm = 0.5v p-p v cm (v) 0 100 120 140 68 20512 g02 80 60 24 10 40 20 0 cmrr (db) v s = 3v v s = 5v v s = 10v frequency (hz) 20 psrr (db) 40 60 80 120 100 10 1k 10k 1m 20512 g03 0 100 100k psrr +psrr load resistance (k ) 0 0 output swing (v) 1 2 3 4 5 6 246 v s = 3v v s = 5v 8 20512 g04 10 r l to gnd output swing vs output current output current (ma) 0.01 0 output voltage (v) 4 5 6 0.1 1 10 20512 g05 3 2 1 v s = 5v v s = 3v bias current vs temperature output swing vs load resistance 5v load resistance (k ) 0 output voltage (v) 1 3 5 8 20512 g06 ? ? 0 2 4 ? ? ? 2 4 6 10 r l to gnd gain/phase vs frequency output swing vs output current, 5v supply output current (ma) 0.01 ? output swing (v) ? ? ? 0 1 2 0.1 1 20512 g07 3 4 r l to gnd 5 ? 10 frequency (hz) ?0 gain (db) phase (deg) 0 40 80 100 100 10k 100k 10m 20512 g08 ?0 1k 1m 20 60 180 140 100 80 200 160 120 v s = 3v or 5v c l = 50pf r l = 100k phase gain temperature ( c) 10 bias current (pa) 100 1k 10k ?0 50 100 125 20512 g09 1 0 v s = 5v v s = 5v v s = 3v
6 ltc2051/ltc2052 sampling frequency vs supply voltage typical perfor a ce characteristics uw sampling frequency vs temperature supply current (per amplifier) vs supply voltage supply current (per amplifier) vs temperature 2v/div 1 m s/div C 0.1 0 1.5 input (v) 500 m s/div output (v) a v = 1 r l = 10k c l = 100pf v s = 5v 0 20512 g11 a v = C 100 r l = 100k c l = 10pf v s = 3v transient response 2050 g12 input overload recovery input bias current vs input common mode voltage input common mode voltage (v) ? input bias current (pa) 150 200 250 3 20512 g10 100 50 0 ? ? 0 1 5 v s = 5v v s = 5v v s = 3v supply voltage (v) 3 sampling frequency (khz) 7 8 11 20512 g13 6 5 5 7 9 10 9 temperature ( c) ?0 sampling frequency (khz) 7 8 125 20512 g14 6 5 0 50 100 10 9 v s = 5v v s = 3v supply voltage (v) 2.5 0 supply current (ma) 0.2 0.4 0.6 0.8 1.0 1.2 4.5 6.5 8.5 10.5 20512 g15 temperature ( c) ?0 supply current (ma) 0.4 0.6 125 20512 g16 0.2 0 0 50 100 1.2 1.0 0.8 v s = 3v v s = 5v v s = 5v
7 ltc2051/ltc2052 applicatio s i for atio wu uu shutdown the ltc2051 includes a shutdown pin in the 10-lead msop. when this active low pin is high or allowed to float, the device operates normally. when the shutdown pin is pulled low, the device enters shutdown mode; supply current drops to 3 m a, all clocking stops and the output assumes a high impedance state. clock feedthrough, input bias current the ltc2051/ltc2052 use autozeroing circuitry to achieve an almost zero dc offset over temperature, common mode voltage and power supply voltage. the frequency of the clock used for autozeroing is typically 7.5khz. the term clock feedthrough is broadly used to indicate visibil- ity of this clock frequency in the op amp output spectrum. there are typically two types of clock feedthrough in autozeroed op amps like the ltc2051/ltc2052. the first form of clock feedthough is caused by the settling of the internal sampling capacitor and is input referred; that is, it is multiplied by the closed-loop gain of the op amp. this form of clock feedthrough is independent of the magnitude of the input source resistance or the magnitude of the gain setting resistors. the ltc2051/ltc2052 have a residue clock feedthrough of less than 1 m v rms input referred at 7.5khz. the second form of clock feedthrough is caused by the small amount of charge injection occurring during the sampling and holding of the op amps input offset voltage. the current spikes are multiplied by the impedance seen at the input terminals of the op amp, appearing at the output multiplied by the closed-loop gain of the op amp. to reduce this form of clock feedthrough, use smaller valued gain setting resistors and minimize the source resistance at the input. if the resistance seen at the inputs is less than 10k, this form of clock feedthrough is less than 1 m v rms input referred at 7.5khz, or less than the amount of residue clock feedthrough from the first form previously described. placing a capacitor across the feedback resistor reduces either form of clock feedthrough by limiting the bandwidth of the closed-loop gain. input bias current is defined as the dc current into the input pins of the op amp. the same current spikes that cause the second form of clock feedthrough previously described , when averaged, dominate the dc input bias current of the op amp below 70 c. at temperatures above 70 c, the leakage of the esd protection diodes on the inputs increase the input bias currents of both inputs in the positive direction, while the current caused by the charge injection stays relatively constant. at elevated temperatures (above 85 c) the leakage current begins to dominate and both the negative and positive pins input bias currents are in the positive direction (into the pins). input pins, esd sensitivity esd voltages above 700v on the input pins of the op amp will cause the input bias currents to increase (more dc current into the pins). at these voltages, it is possible to damage the device to a point where the input bias current exceeds the maximums specified in this data sheet.
8 ltc2051/ltc2052 + 1/2 ltc2051 + a1 + 1/2 ltc2051 6 3 2 5 r4 r5 r3 20512 f01 r2 5v r1 + c2 c1 7 1 6 8 1 3 2 out out the dual chopper op amp buffers the inputs of a1 and corrects its offset voltage and offset voltage drift. with the rc values shown, the power-up warm-up time is typically 20 seconds. the step response of the composite amplifier does not present settling tails. the lt ? 1677 should be used when extremely low noise, v os and v os drift are needed and the input source resistance is low. (for in- stance a 350 w strain gauge bridge.) the lt1012 or equivalent should be used when low bias current (100pa) is also required in conjunction with dc to 10hz low noise, low v os and v os drift. the measured typical input offset voltages are less than 1 m v. obtaining ultralow v os drift and low noise a1 r1 r2 r3 r4 r5 c1 c2 e in (dc C 1hz) e in (dc C 10hz) lt1677 2.49k 3.01k 340k 10k 100k 0.01 m f 0.001 m f 0.15 m v p-p 0.2 m v p-p lt1012 750 w 57 w 250k 10k 100k 0.01 m f 0.001 m f 0.3 m v p-p 0.4 m v p-p typical applicatio u
9 ltc2051/ltc2052 dimensions in inches (millimeters) unless otherwise noted. u package descriptio ms8 package 8-lead plastic msop (ltc dwg # 05-08-1660) ms10 package 10-lead plastic msop (ltc dwg # 05-08-1661) msop (ms8) 1098 * dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.006" (0.152mm) per side ** dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.006" (0.152mm) per side 0.021 0.006 (0.53 0.015) 0 ?6 typ seating plane 0.007 (0.18) 0.040 0.006 (1.02 0.15) 0.012 (0.30) ref 0.006 0.004 (0.15 0.102) 0.034 0.004 (0.86 0.102) 0.0256 (0.65) bsc 12 3 4 0.193 0.006 (4.90 0.15) 8 7 6 5 0.118 0.004* (3.00 0.102) 0.118 0.004** (3.00 0.102) msop (ms10) 1098 * dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.006" (0.152mm) per side ** dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.006" (0.152mm) per side 0.021 0.006 (0.53 0.015) 0 ?6 typ seating plane 0.007 (0.18) 0.040 0.006 (1.02 0.15) 0.009 (0.228) ref 0.006 0.004 (0.15 0.102) 0.034 0.004 (0.86 0.102) 0.0197 (0.50) bsc 12 3 45 0.193 0.006 (4.90 0.15) 8 9 10 7 6 0.118 0.004* (3.00 0.102) 0.118 0.004** (3.00 0.102)
10 ltc2051/ltc2052 gn package 16-lead plastic ssop (narrow 0.150) (ltc dwg # 05-08-1641) s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) dimensions in inches (millimeters) unless otherwise noted. u package descriptio 0.016 ?0.050 (0.406 ?1.270) 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) so8 1298 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) typ 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) bsc 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 8 7 6 5 0.189 ?0.197* (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** gn16 (ssop) 1098 * dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side ** dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side 0.016 ?0.050 (0.406 ?1.270) 0.015 0.004 (0.38 0.10) 45 0 ?8 typ 0.007 ?0.0098 (0.178 ?0.249) 0.053 ?0.068 (1.351 ?1.727) 0.008 ?0.012 (0.203 ?0.305) 0.004 ?0.0098 (0.102 ?0.249) 0.0250 (0.635) bsc 12 3 4 5 6 7 8 0.229 ?0.244 (5.817 ?6.198) 0.150 ?0.157** (3.810 ?3.988) 16 15 14 13 0.189 ?0.196* (4.801 ?4.978) 12 11 10 9 0.009 (0.229) ref
11 ltc2051/ltc2052 s package 14-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) dimensions in inches (millimeters) unless otherwise noted. u package descriptio 0.016 ?0.050 (0.406 ?1.270) 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) s14 1298 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) typ 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) bsc 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 14 13 0.337 ?0.344* (8.560 ?8.738) 0.228 ?0.244 (5.791 ?6.197) 12 11 10 9 5 6 7 8 dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
12 ltc2051/ltc2052 ? linear technology corporation 2000 20512f lt/tp 1100 4k ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com related parts part number description comments ltc1051/ltc1053 precision zero-drift op amp dual/quad ltc1151 15v zero-drift op amp dual high voltage operation 18v ltc1152 rail-to-rail input and output zero-drift op amp single zero-drift op amp with rail-to-rail input and output and shutdown ltc2050 zero-drift op amp in sot-23 single supply operation 2.7v to 5v, shutdown + r r2 1/4 ltc2052 r1 1 3 2 + r r2 1/4 ltc2052 r1 7 4 11 14 5 6 v in + r 1/4 ltc2052 12 13 0.1 f 5v ?v + r r2 1/4 ltc2052 r1 8 10 9 0.1 f 20512 f02 v out v out v in = 3 ; input dc ?10hz noise @ 0.8 v p-p = r2 r1 noise of each parallel op amp 3 paralleling amplifiers to improve noise typical applicatio u

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